Current Issue : January-March Volume : 2024 Issue Number : 1 Articles : 5 Articles
In this work, a tunable pseudo-resistor was designed, simulated, and tested using a 0.35 μm CMOS technology. The proposal used a compact voltage bias circuit free of body-effect, allowing a constant resistance value over the pseudo-resistor’s dynamic range, improving its linearity. A fabricated cell was characterized providing a resistance value from 300 kΩ to 10 GΩ with a THD from <2.5% to 1 GΩ. Additionally, the pseudo-resistor was incorporated into a high-pass OTA filter showing a THD below 0.2% for input voltages in the range ≤ 0.3 Vp. The simulations were compared with experimental measurements in a CMOS-fabricated cell, which verified the proposal’s feasibility....
Researchers are always looking for the improvement of existing methods. Today, CMOS technology is widely used, which has some advantages and disadvantages. One of the alternative methods for CMOS technology is QCA technology which compared to CMOS, has the advantages of low energy consumption and small occupied area. In this paper, by using the concepts and methods of QCA technology, a digital code converter is presented. In this converter, a new gate is used, which can produce outputs such as 4-input AND, 4-input OR, 4-input NAND, and 4-input NOR. The proposed converter has 10 inputs and 12 outputs. The10 inputs are decimal numbers from 0 to 9, producing the output equivalent to excess-3, BCD, and gray codes. One of the advantages of this circuit is providing three different codes per input in just one circuit. In addition, due to the use of the new 4-input gate, the occupied area and the number of used cells were minimized. Simulations were performed by using QCADesigner-E version 2.2, and outcomes illustrated that the occupied area is equal to 0.29 μm2 and 380 QCA cells with 7 clock phases are used. The energy dissipation of the presented circuit is 171 meV. Also, given the favorable performance exhibited by the 4-input gate across various measurement parameters, it possesses the capability to be efficiently employed within larger and intricately designed circuits....
Diamond-based transistors have been considered as one of the best choices due to the numerous advantages of diamond. However, difficulty in the growth and fabrication of diamond needs to be addressed. In this paper, high quality diamond film with an atomically flat surface was grown by microwave plasma chemical vapor deposition. High growth rate, as much as 7 μm/h, has been acquired without nitrogen doping, and the root mean square (RMS) of the surface roughness was reduced from 0.92 nm to 0.18 nm by using a pre-etched process. H-terminated diamond MOSFETs were fabricated on a high-quality epitaxial diamond layer, of which the saturated current density was enhanced. The hysteresis of the transfer curve and the shift of the threshold voltage were significantly reduced as well....
To realize profitable applications with 2D-materials the transition from research scale to microelectronic fabrication methods is needed. This means the use of equipment for larger substrates and assessment of the process flows. In this study we demonstrate an effective way to assess MoS2 as semiconducting material, deposited with the lower priced precursorsMo(CO)6 andH2S on 200mm silicon wafers.Wecould show how the evolution of layer quality develops depending on temperature and interface pretreatment. It is not possible to achieve mono-layers of 0.6nmwith high quality due to seeding kinetics and mechanism. In contrast, layers with thicknesses above 3nmhave suitable electrical and optical qualities to proceed with the design of active devices on 200mmwafers....
The paper introduces a range of efficient algorithmic solutions for implementing the fundamental filtering operation in convolutional layers of convolutional neural networks on fully parallel hardware. Specifically, these operations involve computing M inner products between neighbouring vectors generated by a sliding time window from the input data stream and an Mtap finite impulse response filter. By leveraging the factorisation of the Hankel matrix, we have successfully reduced the multiplicative complexity of the matrix-vector product calculation. This approach has been applied to develop fully parallel and resource-efficient algorithms for M values of 3, 5, 7, and 9. The fully parallel hardware implementation of our proposed algorithms achieves approximately a 30% reduction in embedded multipliers compared to the naive calculation methods....
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